Early HJT production relied on thick wafers, pure silver pastes, and amorphous silicon layers, resulting in higher costs and lower efficiencies
Second-generation HJT has introduced thinner wafers, microcrystalline silicon layers, and silicon oxide integration to improve current generation and overall performance
Multi-layer passivation structures help balance optical and electrical losses, improving interface quality while maintaining strong surface passivation
Heterojunction (HJT) cell manufacturing follows a distinctly different process sequence compared to mainstream technologies. After the silicon wafers are etched to remove saw damage and textured, intrinsic amorphous silicon layers are applied to both sides, followed by doped amorphous silicon films with opposite polarities. Next, a TCO film is applied to act as an antireflective coating and conductive electrode for current extraction. A metallic grid is then screen-printed onto the TCO and cured to form the HJT cell. While keeping these fundamentals intact, a few technical advancements in the HJT segment have driven the technology’s progress.
The above description is apt for the first generation of HJT technology, as characterized by Risen’s Po-Chuan Yang. On Day 4 of the TaiyangNews High-Efficiency Solar Technologies Conference 2025, the day dedicated to HJT, he emphasized that the pre-2020 phase was limited by a high reliance on silver. At that time, the industry used pure silver paste, which remains very expensive. Wafer thickness was in the range of 130 to 150 μm, and the efficiency of amorphous silicon passivation was relatively low.
The 2022 to 2026 period, characterized as the second generation, was marked by several breakthroughs, some of which were covered in the previous report, with additional fresh developments. Starting at the wafer level, as discussed in the previous report, the wafer thickness was reduced to around 110 μm, which remains the standard. A major structural change was the replacement of the doped amorphous silicon layers with microcrystalline silicon. The details on this transition have already been covered in the previous report. The structure is further enhanced by introducing oxygen to form silicon oxide, thereby increasing the short-circuit current.
HJT cells use a thin intrinsic amorphous silicon layer to passivate the silicon surface and reduce defect-related losses. This layer plays a key role in determining overall cell efficiency. However, it also comes with trade-offs. The material absorbs part of the incident light, even at nanometer-scale thicknesses, which reduces short-circuit current. In addition, its growth can create interface defects, increasing recombination and affecting voltage. To overcome these limitations, the passivation layer is engineered as a multi-layer stack. A porous silicon oxide-rich layer is placed near the wafer to improve interface quality, capped by a denser hydrogen-rich layer to enhance passivation. This combination helps balance optical losses and electrical performance, enabling higher overall efficiency.
The text is an edited excerpt from TaiyangNews’ report on Cell & Module Technology Trends 2026, which can be downloaded for free here.