- Markets
- Business
- People
- Opinion
- Technology
- Storage+
- Reports
- Our Events
- Tenders
- Price Index
- Top Modules
- ServicesServices
- AnalysisAnalysis
HJT is more tolerant of wafer-quality variations, oxygen content, and lifetime fluctuations than many other cell technologies, providing greater flexibility in wafer selection
The technology’s symmetrical structure, low-temperature processing, and superior surface passivation make it particularly compatible with thin wafers, with mainstream thicknesses approaching 100 μm
Despite the technical advantages of thinner wafers, low polysilicon prices are currently limiting the industry’s motivation to further reduce wafer thickness
The benefits of HJT extend to the wafer level – or rather, originate from this upstream stage. One key advantage of HJT is its greater tolerance for wafer-quality variations compared to other technologies. This allows for more flexibility in choosing wafers without significantly affecting performance. As explained in our previous edition, annealing has become a standard step in the HJT process. To meet the demand for high-quality wafers, the industry uses a heat treatment that mimics gettering, a process that removes metallic impurities through thermal treatment. In addition, HJT can better tolerate higher oxygen content, since it does not involve high-temperature steps that could activate oxygen-related defects. This makes the technology compatible with low-cost wafers cut from ingots produced with rechargeable Czochralski (Cz) methods, which often have higher oxygen levels. Regarding electrical parameters, the typical resistivity ranges from 0.3 to 2.1 Ω·cm. Additionally, HJT is more forgiving in terms of lifetime requirements, thanks to its world-class surface passivation provided by intrinsic amorphous silicon. This excellent surface quality reduces recombination efficiently and can offset a slightly lower bulk lifetime in the wafer (see HJT Shifts Focus From Peak Efficiency To System Value).
Regarding physical properties, most HJT producers have adopted half-wafer processing. This enables them to improve the ingot utilization rate by deriving half-bricks from the ingot’s side slabs. The HJT segment, however, has not been very active in terms of dimensions. While G12 remained the mainstream wafer for a long time, leading HJT makers have eventually adopted rectangular wafer formats.
The real progress achieved at the wafer level for HJT lies in thickness. HJT offers greater compatibility with thinner wafers, with several factors making it particularly well-suited for them. The technology’s symmetrical cell structure and low-temperature processing are 2 such factors, and the surface passivation of HJT becomes increasingly advantageous as wafer thickness decreases. In fact, Risen says it was the first company to commercialize a 110 μm G12 half-wafer back in 2023.
This also aligns with the CPIA’s estimate that the mainstream wafer thickness for HJT is about 110 μm, which is expected to narrow to 100 μm between 2026 and 2028 and remain at this level through 2035. Note that the ITRPV projects a gradual decrease in wafer thickness from nearly 120 μm in 2025 to 95 μm by 2035.
However, given the prevailing low price of polysilicon, there is little motivation for manufacturers to adopt thinner wafers.
The text is an edited excerpt from TaiyangNews’ report on Cell & Module Technology Trends 2026, which can be downloaded for free here.
